HomeUpdatesIntel updates Linux with support for Sapphire Rapids

Intel updates Linux with support for Sapphire Rapids

Intel named Sapphire Rapids the fourth generation Xeon processor in 2019 and revealed support for DDR5, PCIe 5.0 and in-package memory in recent years. But for all that, they have not committed a release plan.

See also: Intel Platform Update: Intel fixes 73 vulnerabilities in its products

Last week, Intel introduced a change to the Linux kernel that provides the necessary updates needed to run Sapphire Rapids processors with their in-package memory enabled. In theory, then, Intel is preparing to do it tape out, i.e. to launch the final result of the sample design process for performance tests.

Batch memory, or in this case batch memory, is an idea to insert another layer of memory between L3 cache and system memory. Sapphire Rapids HBM2e package will be much faster than DDR5, with very simple math, maybe five or ten times faster.

At this point, however, no one is sure what this will mean for performance. Intel's new Linux submission is an update to the EDAC i20nm driver that provides a detection and fix report memory errors - if someone had performed tests without using it, then their results would have no meaning.

See also: Intel: PCs offer a better gaming experience than macs

According to their submission, Intel reveals that: "A future Xeon processor will include HBM in-package", which would be nice, but goes on to reveal that the HBM in-package memory controller shares the same architecture as normal DDR memory controller, ”which means at least that it will not be difficult for the software to be updated to use in-package memory.

Sapphire rapids

In related news, as you can see above, there are photos of Sapphire Rapids available. The pictures show that they can not have 80 cores as we previously thought.

See also: Intel: Processors with clock speed 5.0 GHz and 5G M.2 module for laptops

In the pictures below, the four-by-five grid taken to suggest the existence of 20 cores is still visible, but now we can see that one of the rows does not contain cores. One of the squares mixed with the others also seems to contain a different one internal structure from the cores, creating a total of 15 cores per core complex or 60 per quad-core processor. Rumor has it that poor performance is forcing Intel to disable one core per complex, resulting in a usable set of 56 cores.

Source of information: techspot.com

Teo Ehchttps://www.secnews.gr
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